简析内核中固定时钟及相关时钟的定义和初始化：
参考链接：
https://blog.csdn.net/zgtzqzg2020/article/details/109220048
https://www.freesion.com/article/4436438726/
can节点中配置的24M的固定时钟：
clk_osc24m: osc24m {#clock-cells = <0>;compatible = "allwinner,fixed-clock";clock-frequency = <24000000>;clock-output-names = "osc24m";
};can0: can@0 {compatible = "microchip,mcp2515";pinctrl-names = "default";clocks = <&clk_osc24m>;status = "okay";
};
相关文件：
linux-4.9/drivers/clk/sunxi/clk-sunxi.c
linux-4.9/drivers/clk/sunxi/clk-sun50iw9.c
linux-4.9/include/linux/clk-provider.h
pll-clock和fixed-factor-clock（固定分频因子时钟），可以看到clk_pll_periph0x2使用clk_pll_periph0作为其时钟源：
clk_pll_periph0: pll_periph0 {#clock-cells = <0>;compatible = "allwinner,pll-clock";assigned-clocks = <&clk_pll_periph0>;assigned-clock-rates = <600000000>;lock-mode = "new";clock-output-names = "pll_periph0";};clk_pll_periph0x2: pll_periph0x2 {#clock-cells = <0>;compatible = "allwinner,fixed-factor-clock";clocks = <&clk_pll_periph0>;clock-mult = <2>;clock-div = <1>;clock-output-names = "pll_periph0x2";};
固定时钟驱动函数：
static void __init of_sunxi_fixed_clk_setup(struct device_node *node)
{struct clk *clk;const char *clk_name = node->name;u32 rate;if (of_property_read_u32(node, "clock-frequency", &rate))return;if (of_property_read_string(node, "clock-output-names", &clk_name)) {pr_err("%s:get clock-output-names failed in %s node\n",__func__, node->full_name);return;}clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT, rate);if (!IS_ERR(clk)) {clk_register_clkdev(clk, clk_name, NULL);of_clk_add_provider(node, of_clk_src_simple_get, clk);}
}固定分频因子时钟驱动函数：
static void __init of_sunxi_fixed_factor_clk_setup(struct device_node *node)
{struct clk *clk;const char *clk_name = node->name;const char *parent_name;u32 div, mult;if (of_property_read_u32(node, "clock-div", &div)) {pr_err("%s Fixed factor clock <%s> must have a clock-div property\n",__func__, node->name);return;}if (of_property_read_u32(node, "clock-mult", &mult)) {pr_err("%s Fixed factor clock <%s> must have a clokc-mult property\n",__func__, node->name);return;}if (of_property_read_string(node, "clock-output-names", &clk_name)) {pr_err("%s:get clock-output-names failed in %s node\n",__func__, node->full_name);return;}parent_name = of_clk_get_parent_name(node, 0);clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,mult, div);if (!IS_ERR(clk)) {clk_register_clkdev(clk, clk_name, NULL);of_clk_add_provider(node, of_clk_src_simple_get, clk);}
}CLK_OF_DECLARE(sunxi_clocks_init, "allwinner,clk-init", of_sunxi_clocks_init);
CLK_OF_DECLARE(sunxi_fixed_clk, "allwinner,fixed-clock", of_sunxi_fixed_clk_setup);
CLK_OF_DECLARE(sunxi_pll_clk, "allwinner,pll-clock", of_sunxi_pll_clk_setup);
CLK_OF_DECLARE(sunxi_fixed_factor_clk, "allwinner,fixed-factor-clock", of_sunxi_fixed_factor_clk_setup);
CLK_OF_DECLARE(sunxi_cpu_clk, "allwinner,cpu-clock", of_sunxi_cpu_clk_setup);
CLK_OF_DECLARE(sunxi_periph_clk, "allwinner,periph-clock", of_sunxi_periph_clk_setup);
CLK_OF_DECLARE(periph_cpus_clk, "allwinner,periph-cpus-clock", of_sunxi_periph_cpus_clk_setup);
#define CLK_OF_DECLARE(name, compat, fn) OF_DECLARE_1(clk, name, compat, fn)
TBC