if {[file exists work]} {
file delete -force work
}
#Creat a work lib
vlib work
#vmap
vmap work work
#Compile the source files(下面不能空行)
vlog -novopt \
../src/test_pll.v\
../quartus/pll_ip/pll.v\
../tb/tb.v
#start simulator (即使在Modelsim中添加了相关库也必须在vsim时 -L 添加相关库进入。)
vsim -novopt -L 220model -L altera_mf -L altera_primitives work.tb
do wave.do
#编译相关的库
-y C:/lscc/diamond/3.4_x64/cae_library/simulation/verilog/ecp3 +libext+.v \
#链接相关的文件夹
+incdir+../drr3_ip_ddr 1_bank7/ddr_p_eval/testbench/tests/ecp3 \