TI官方的提供的代码
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//******************************************************************************
// MSP-FET430P140 Demo - Basic Clock, Output Buffered SMCLK, ACLK and MCLK
//
// Description: Output buffered MCLK, SMCLK and ACLK.
// ACLK = LFXT1 = 32768, MCLK = DCO Max, SMCLK = XT2
// //* XTAL's REQUIRED - NOT INSTALLED ON FET *//
// //* Min Vcc required varies with MCLK frequency - refer to datasheet *//
//
// MSP430F149
// -----------------
// /|\| XIN|-
// | | | 32k
// --|RST XOUT|-
// | |
// | XT2IN|-
// | | XTAL (455k - 8Mhz)
// |RST XT2OUT|-
// | |
// | P5.4|-->MCLK = DCO Max
// | P5.5|-->SMCLK = XT2
// | P5.6|-->ACLK = 32kHz
//
// M. Buccini
// Texas Instruments Inc.
// Feb 2005
// Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.21A
//******************************************************************************#include <msp430.h>int main(void)
{WDTCTL = WDTPW +WDTHOLD; // Stop Watchdog TimerDCOCTL = DCO0 + DCO1 + DCO2; // Max DCOBCSCTL1 = RSEL0 + RSEL1 + RSEL2; // XT2on, max RSELBCSCTL2 |= SELS; // SMCLK = XT2P5DIR |= 0x70; // P5.6,5,4 outputsP5SEL |= 0x70; // P5.6,5,5 optionswhile(1){}
}简单说明
这里用到了
DCOCTL ；BCSCTL1；BCSCTL2 ；//寄存器
并通过P5.6,5,4 引脚的第二功能输出对应时钟频率。
有兴趣的可以直接拷入代码试试，用示波器来看对应的时钟频率；
时钟说明
由下图可以知道，ACLK的时钟只能是有LFXT1CLK提供；
MCLK由XT2CLK或者DCOCLK或者LFXT1CLK提供；主要设置SELMx；
SMCLK由XT2CLK或者DCOCLK提供；主要设置SELS；
寄存器说明
配置好时钟主要看懂以下5个寄存器就好，算是比较容易了，刚开始比较麻烦，后来看了带锁频器的F5438A有9个寄存器来控制时钟系统，突然觉得这个还是可以接受的，哭脸一个.
上面的注意有一个复位是用POR不是PUC；
DCOCTL是调制DCOCLK时钟源的频率的（所以说，这个是个可调频率的振荡器，不是市面上卖的那种，是多少就是多少那种）；对定时要求不是特别严格的，可以直接用默认的就好；
DCOx主调
MODx微调
1&2就是开始做选择了，时钟的分频呀啥啥啥的，哎，其实还好，比5.1稍稍麻烦一点点而已
两个中断相关寄存器。中断使能位和中断标志位。
两个寄存器目前用到了这两位，就先写出这两位，其他位其实是有东西的
